#ifndef _CHIP_S3602F_H_
#define _CHIP_S3602F_H_

#define GPIO_REG                    0xb8000430  //gpio0 ~ gpio31
#define GPIOA_REG                   0xb8000434  //gpio32 ~ gpio63
#define GPIOB_REG                   0xb8000438  //gpio64 ~ gpio95
#define GPIOC_REG                   0xb800043c  //gpio96 ~ gpio127
#define GPIOD_REG                   0xb8000440  //gpio128 ~ gpio136

#define PIM_MUX_BASE                0xb8000000
#define PIN_MUX_REG_MASK            0xff000000
#define PIN_MUX_REG_SHIFT           24
#define PIN_BIT_HEIGHT_MASK         0x0000ff00
#define PIN_BIT_LOW_MASK            0x000000ff
#define PIN_BIT_HEIGHT_SHIFT        8
#define PIN_BIT_LOW_SHIFT           0
#define PIN_MUX_88H                 (0x88 << PIN_MUX_REG_SHIFT)
#define PIN_MUX_8CH                 (0x8c << PIN_MUX_REG_SHIFT)
#define PIN_MUX_A8H                 (0xa8 << PIN_MUX_REG_SHIFT)
#define PIN_MUX_ACH                 (0xac << PIN_MUX_REG_SHIFT)
    
// Reg addr | reserved | end bit | start bit
#define RMII_INTERRUPT_SEL              (PIN_MUX_88H | 31)                      //pin205        
#define RMII_SEL                        (PIN_MUX_88H | 30)                      //pin202 ~ pin204 pin206 ~ pin210 pin212 pin213
#define SDIO_SEL                        (PIN_MUX_88H | 28)                      //pin44 ~ pin49 
#define I2C2_SEL                        (PIN_MUX_88H | 27)                      //pin155 pin156 
#define I2C2_SEL2                       (PIN_MUX_88H | 26)                      //pin9 pin16
#define I2C2_SEL3                       (PIN_MUX_88H | 25)                      //pin193 pin194
#define I2C_SEL                         (PIN_MUX_88H | 24)                      //pin19 pin20
#define UART_SEL                        (PIN_MUX_88H | (23 << 8) | 22)          //pin2 pin3         
                                                                                //00: UART Sel(default)                                                                         
#define UART2_SEL                       (PIN_MUX_88H | (21 << 8) | 20)          //pin167 pin168     
                                                                                //00: No function(default) 01: UART sel                                                                             
#define UART2_SEL2                      (PIN_MUX_88H | (19 << 8) | 18)          //pin13 pin17
                                                                                //00: No function(default) 01: UART2 Sel2
#define  SMC_SEL                           (PIN_MUX_88H | 14)                                                         
#define SMART_ATNA_SEL                  (PIN_MUX_88H | 10)                      //pin215
#define SMART_ATNA_SEL2                 (PIN_MUX_88H | 9)                       //pin9
#define HDMI_CEC_SEL4                   (PIN_MUX_88H | 8)                       //pin200
#define HDMI_CEC_SEL2                   (PIN_MUX_88H | 6)                       //pin215
#define SMCARD_SEL                      (PIN_MUX_88H | 5)                       //pin45 ~ pin49
#define CI_ADDR_SEL                     (PIN_MUX_88H | 2)                       //pin175 pin177 pin179 ~ pin181
#define CI_SEL2                          (PIN_MUX_88H | 1)      
#define CI_SEL                          (PIN_MUX_88H | 0)                       //

#define BGA_I2S_OUTPUT_SEL           (PIN_MUX_8CH | 31)     
#define I2SO_8_CHANNELS_SEL             (PIN_MUX_8CH | 30)                      //pin216 ~ pin218 pin220 pin225 pin220 pin223
#define I2SO_DATA_3_1_SEL               (PIN_MUX_8CH | 29)                      //pin210 pin212 pin213
#define I2SI_SEL                        (PIN_MUX_8CH | 28)                      //pin202 ~ pin204 pin206
#define RMII_CLK_SEL                    (PIN_MUX_8CH | 25)                      //pin202
#define TSSI2_SEL                       (PIN_MUX_8CH | 5)                       //pin11 pin13 pin15 pin16 pin18
#define TSSI_SEL                        (PIN_MUX_8CH | 4)                       //pin4 ~ pin8
#define  TSPI1_SEL	                (PIN_MUX_8CH | 3)   
#define TSPI2_SEL                       (PIN_MUX_8CH | 2)                       //1: TS SPI2 Sel(Default) 0:No function
#define ASSI2_SEL                       (PIN_MUX_8CH | 1)                       //pin4 ~ pin9
#define ASSI_SEL                        (PIN_MUX_8CH | 0)                       //pin11 pin13 pin15 ~ pin18


#define I2SO_SHARE_ADAC_DATA_SRC_SEL    (PIN_MUX_A8H | 31)                      //0: from data0(default) 1: from data3
#define I2SO_OUT_FROM_ADC_PINS_SEL      (PIN_MUX_A8H | 29)                      //0: No function(default) 1: I2SO out from ADC pins sel
                                                                                //pin220 pin222 pin223 pin225
#define VDAC_GPIO_SEL                   (PIN_MUX_A8H | (27 << 8) | 24)          //pin 226 pin227 pin230 pin234  
                                                                                //0000: No function(default) 1111: VDAC GPIO Sel
        
#define I2SO_SHARE_MEMBUS_DATA_SRC_SEL  (PIN_MUX_A8H | 23)                      //0: from data0(default) 1: from data3
#define CI_ADDR_OUTPUT_CTL              (PIN_MUX_A8H | 22)                      //pin115 pin116 pin118 ~ pin120  
                                                                                //0: No function(default) 
                                                                                //1: ci address[14,13,11,9,8] output from membus high bit pins
                                    
#define I2SO_SEL3                       (PIN_MUX_A8H | 21)                      //pin115 pin116
#define I2SO_MCK_PIN120_SEL             (PIN_MUX_A8H | 20)                      //pin120
#define I2SO_BLR_CLK_SEL                (PIN_MUX_A8H | 19)                      //pin118 pin119
#define I2SI_BLR_CLK_SEL                (PIN_MUX_A8H | 18)                      //pin118 pin119
#define I2SO_DATA_PIN116_SEL            (PIN_MUX_A8H | 17)                      //pin116            
#define I2SI_DATA_PIN115_SEL            (PIN_MUX_A8H | 16)                      //pin115
#define CI_CTRL_PIN_SEL                 (PIN_MUX_A8H | 15)                      //pin128 pin130 pin132 pin133
#define SFLASH_CS1_SEL                  (PIN_MUX_A8H | 14)                      //pin125
#define RMII_MDC_SEL                    (PIN_MUX_A8H | 13)                      //pin122 pin123
#define SMCARD2_SEL                     (PIN_MUX_A8H | 12)                      //pin115 pin116 pin118 ~ pin120

#define UART2_TX_SEL                    (PIN_MUX_ACH | 29)                      //pin3
#define CI_PINS_CEJ_VCC_ENJ_CTL         (PIN_MUX_ACH | 28)                      //0: output(default) 1: input
#define VDATA_SEL                       (PIN_MUX_ACH | 19)          
#define VCLK_SEL                        (PIN_MUX_ACH | 18)                      //pin160
#define VSYNC_SEL                       (PIN_MUX_ACH | 17)                      //pin159
#define HSYNC_SEL                       (PIN_MUX_ACH | 16)                      //pin158
#define I2SO_SHARE_GPIO7_DATA_SRC_SEL   (PIN_MUX_ACH | 12)                      //0: from data0(default) 1:from data3
#define I2SI_DATA_PIN142_SEL            (PIN_MUX_ACH | 11)                      //pin142
#define I2SO_DATA_PIN143_SEL            (PIN_MUX_ACH | 10)                      //pin143
#define I2SO_BLR_CLK_PIN144_PIN145_SEL  (PIN_MUX_ACH | 9)                       //pin144 pin145
#define I2SO_MCK_PIN146_SEL             (PIN_MUX_ACH | 8)                       //pin146
#define SPDF_SEL2                       (PIN_MUX_ACH | 7)                       //pin205
#define I2SO_SEL2                       (PIN_MUX_ACH | 6)                       //pin215 ~ pin218   
#define I2SI_DATA_SEL2                  (PIN_MUX_ACH | 5)                       //pin205
#define I2SI_DATA_SEL3                  (PIN_MUX_ACH | 4)                       //pin215
#define SFLASH_CS1_SEL3                 (PIN_MUX_ACH | 1)                       //pin215
#define SFLASH_CS1_SEL_216PIN           (PIN_MUX_ACH | 0)                       //pin178    


#endif

